ASIC Design Engineer - Cache Controller

Apple

Santa Clara, Santa Clara County$191,600 - $191,600 est.Full-timePosted 7h ago
Apple is building the world’s fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth. In this role, you will work on crafting special purpose cache and controller which is part and parcel of t…

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Who is hiring for ASIC Design Engineer - Cache Controller at Apple?+
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